Sandhya DwarkadasSandhya Dwarkadas

Grad Cohort

Sandhya Dwarkadas is the Albert Arendt Hopeman Professor of Engineering and Professor and Chair of Computer Science at the University of Rochester, with a secondary appointment in Electrical and   Computer Engineering. She received her Bachelor’s from the Indian Institute of Technology, Madras, India, and her M.S. and Ph.D. from Rice University. Her research lies at the interface of hardware and software with a   particular focus on concurrency, resulting in over a 100 refereed publications that cross areas within systems. She has made contributions to hardware- and software-based shared memory implementations and system reconfigurability.   She is co-inventor on 11 granted U.S. patents. She is a CRA-W board member,     and is currently on the editorial board of CACM Research Highlights and     IEEE Micro. Her recent research focuses on addressing the challenge of leveraging the   computational power of the increasingly large core counts available on today’s processors. Her research addresses the challenge at three levels —   via scalable hardware cache coherence protocols, via improved language and runtime support for expressing and extracting application parallelism, and   via operating system-level energy and resource management. She also continues to stay involved in parallel applications development,   particularly in the biomedical domain.