The Computing Community Consortium (CCC) will hold a virtual workshop the week of Oct. 5-9 (with a virtual reception on Friday, Oct. 2) to address the physics & engineering challenges in adiabatic/ reversible classical computing. This workshop will gather the research community in this field, lay a common foundation of existing state-of-the-art knowledge, and work together to prepare a comprehensive workshop report that can make the case for a major new initiative effectively to federal-level decision-makers.

Workshop attendance will be by invitation only. We seek short position papers to help create the agenda for the workshop and select attendees. If you are interested in participating in the workshop, please see the Application tab for information on how to submit a position paper for consideration. More details about the motivation for this workshop can be found below. 

It has become widely recognized that today’s approach to general digital computation, which is based on standard combinational and sequential digital architectures constructed out of standard (irreversible) Boolean logic elements implemented using CMOS (complementary metal/oxide/semiconductor) transistor technology, is approaching fundamental physical limits to further improvements on its energy efficiency and power-limited performance. The final (2015) edition of the International Technology Roadmap for Semiconductors (ITRS), as well as recent editions of its successor roadmap, the International Roadmap for Devices and Systems (IRDS), suggest that a practical limit will be reached by around the year 2030. By the end of the CMOS roadmap, logic signal energies at the gate of a minimum-sized transistor simply cannot decrease much further without running afoul of fundamental limits on efficiency and stability arising from thermal fluctuations. Even moving to “Beyond CMOS” switching devices cannot improve this situation very much, since the same fundamental thermodynamic limits still apply.

Thus, there is an increasing need to explore new fundamental paradigms for the engineering implementation of general computing systems (at all scales from tiny embedded devices to large-scale supercomputers and data centers) in search of novel concepts for computation that can transcend the above limits that are inherent to the traditional irreversible digital paradigm. The space of ideas that have been considered include a variety of concepts for “physical” computing (computing that leverages fundamental physics to do computing in a more direct way than in the traditional digital paradigm), including various analog and stochastic computing concepts, as well as quantum computing (for problems amenable to quantum speedups).

In January 2019, a CCC workshop on “Thermodynamic Computing” (TDC) was held specifically to explore the space of new computing paradigms inspired by the application of the principles of thermodynamics (and in particular, the modern non-equilibrium/stochastic approaches to thermodynamics). During the breakout sessions of the TDC workshop, Michael Frank (one of the organizers of this Reversible Computing workshop) proposed a related new “priority research direction” on “Physics and Engineering of Reversible Computing Hardware”[1]. As discussed in the resulting TDC workshop report, reversible computing can be considered to be the historically first conceptualization of thermodynamic computing, having first been considered in as early as 1961 by Rolf Landauer [2].

However, despite the broad applicability of reversible computing, and its rather conservative nature relative to the wider playing field of alternative computing schemes, the mainstream computing industry still views reversible computing as constituting an extremely radical departure from the way things are done today. There are a substantial number of important questions about basic physical science issues pertaining to reversible computing that still need to be explored. These are in the nature of quite fundamental research problems that, if they were investigated in more depth and solved effectively, could result in revolutionary improvements in the basic practical characteristics (speed, power, size, cost) of the primitive functional elements of a reversible machine, as well as the higher-level circuits and systems built out of these. 

Thus, we view the basic science and engineering of reversible computers as being currently an extremely ripe area of focus for future large-scale federal research initiatives, for the following reasons:

1. The reversible computing field is absolutely necessary for there to be any hope of advancing ordinary general digital computing beyond the energy-efficiency limits that apply to the conventional computing paradigm, which will definitely be reached in the foreseeable future;
2. There is a range of important foundational physical science research in the reversible computing field that could have potential revolutionary impact, that still needs to be done;
3. This field has so far been too forwards-looking for industry to invest in directly, although at least one major industrial research lab is presently considering starting up a project to investigate the limits of computing, including reversible computing.
4. There has not yet been any major U.S. Federal research initiative that has focused on this field. We only know of two, relatively small Federal programs that are active in this field currently:
   1. The “Adiabatic/Reversible Logic Test Chip” STTR program sponsored by AFRL [3]; so far only two university performers (Notre Dame and University of Kentucky) have been sponsored under this program;
   2. The Army Research Office’s Advanced Computing Initiative (ACI) [4] mentioned reversible computing as an area of interest, and we know that there has been at least one award for reversible computing issued under that program (to Sandia).

This workshop will gather the research community in this field, lay a common foundation of existing state-of-the-art knowledge, and work together to prepare a comprehensive workshop report that can make the case for a major new initiative effectively to federal level decision-makers. Workshop attendance will be by invitation only. We seek short position papers to help create the agenda for the workshop and select attendees. If you are interested in participating in the workshop, please see the Application tab for information on how to submit a position paper for consideration.

[1] M. P. Frank, “Priority Research Direction: Physics & Engineering of Reversible Computing Hardware,” January 2019. [Online]. Available: https://cfwebprod.sandia.gov/cfdocs/CompResearch/docs/Frank_Reversible_Computing_2v1.pdf. [Accessed 20 September 2019].

[2] R. Landauer, “Irreversibility and Heat Generation in the Computing Process,” IBM Journal of Research and Development, vol. 5, no. 3, pp. 183-191, 1961.

[3] A. C. Pineda, “Adiabatic/Reversible Logic Test Chip,” 20 April 2018. [Online]. Available: https://www.sbir.gov/sbirsearch/detail/1482545. [Accessed 20 September 2019].

[4] J. M. Coyle, “Broad Agency Announcement for Department of Defense Advanced Computing Initiative (ACI),” February 2019. [Online]. Available: https://www.arl.army.mil/www/pages/8/ARO%20NSA%20BAA%20-%20final%20to%20post%20secure%20v2.pdf. [Accessed 20 September 2019].