CRA-WP Board Welcomes Two New Members: Jeanine Cook and Russ Joseph
CRA-WP has welcomed new members to its board of directors – Jeanine Cook, Sandia National Laboratories and Russ Joseph, Northwestern University.
Jeanine Cook is a principal member of technical staff at Sandia National Laboratories in Albuquerque, New Mexico, in the Scalable Architectures Department at the Computer Science Research Institute. After earning a BS in electrical engineering from the University of Colorado in Colorado Springs, a MS in computer science from the University of Colorado, Boulder, and a Ph.D. in computer science from New Mexico State University (NMSU), Jeanine joined the faculty in the Klipsch School of Electrical and Computer Engineering at NMSU. During her eleven-year tenure she graduated eight Ph.D. students and twelve Master’s theses students, and in 2009 received the Presidential Early Career Award for Scientists and Engineers for her work in processor performance modeling. In 2012, she moved to Sandia National Laboratory and joined the Scalable Architectures Department. Jeanine is a leading researcher in the fields of High-Performance Computing, performance characterization and modeling, hardware accelerator technologies, and large-scale system monitoring and data analytics. In addition, she has focused for many years on diversity issues in computer science, instantiating and participating in numerous NSF Broadening Participation in Computing projects, serving on the Board of Directors for the Center for Minorities and People with Disabilities in Informational Technology (CMD-IT), and in 2020 she received the Richard A. Tapia Achievement Award.
Russ Joseph is an associate professor of electrical and computer engineering and computer science at Northwestern University in Evanston, IL. His primary research interest is in computer architecture, focusing on the design and implementation of power-aware and reliability-aware computer systems. Some of his recent projects have examined microprocessor design for reliability and variability tolerance, co-designed circuit/compiler technologies to support timing level speculation, and on-line power management for multi-core systems. Prior to joining the Northwestern faculty, Russ completed his Ph.D. in electrical engineering at Princeton University and earned his BS in electrical and computer engineering with an additional major in computer science from Carnegie Mellon University. He is the recipient of an NSF CAREER Award.